Exploring Multi-Level Composition and Efficient MCM Schemes for an Energy-Efficient Wavelet Haar Architecture
Keywords:Haar Wavelet Transform, MCM, Hardware Architectures, VLSI Design
This work explores multi-level fixed-point Haar transform compositions combined with MCM (multiple constant multiplication) schemes for an energy-efficient hardware architecture. We investigate a set of six lower-level Haar transforms for composing a Haar-9 architecture. The multiple-level Haar transforms use as a base M=1, M=2, and M=3 resolution levels. The processing module (PM) of the Haar explores efficient MCM schemes. The architectures were described in VHDL and synthesized employing the ST 65nm CMOS cell library. The results show that Haar-II architecture presents the lower circuit area results since this architecture requires fewer arithmetic operators. However, the most energy-efficient Haar-9 hardware architecture employs a combination of two M=2 with five M=1 blocks with a efficient MCM architecture reduced to only two arithmetic operators.