Design Validation of Multithreaded Processors Using Threads Evolution

Authors

  • D. Ravotto
  • E. Sanchez
  • M. Sonza Reorda
  • G. Squillero

DOI:

https://doi.org/10.29292/jics.v5i1.311

Keywords:

SBST, multithread processors, functional validation, automatic program generation

Abstract

Within the design arena of modern devices based on cutting-edge processor cores, the availability of effective verification, validation and test methodologies able to work on high-level descriptions of processor cores represents an interesting advantage, since it can dramatically reduce the overall time for design and manufacturing, while improving yield and quality. In this paper we propose a semi-automatic test program generation technique able to target modules in modern computer architectures that implement the multithreading paradigm. The methodology starts from high level descriptions of processor cores and using an incremental multi-run approach produces, with very limited manual intervention, a test set able to maximize verification metrics. Experimental results gathered on a couple of real complex designs (the OpenSPARC™ T1 and T2) show the effectiveness of the proposed methodology.

Additional Files

Published

2020-11-21