A 5.4 GHz Fully-Integrated Low-Noise Mixer

Authors

  • Stanley S. K. Ho
  • Carlos E. Saavedra

DOI:

https://doi.org/10.29292/jics.v6i1.334

Keywords:

RFIC, Mixer, CMOS, MMIC, Low-noise, Microwaves

Abstract

An active mixer using a Gilbert-cell topology that incorporates a low-noise RF transconductance stage is presented in this paper. The chip operates at a frequency of 5.4 GHz and was fabricated in 180 nm CMOS technology. A current-bleeding circuit is used to provide different dc bias currents to the LO switching stage and the RF transconductors. The transconductor, designed using the power constrained simultaneous noise and input match technique, together with the bleeding circuit enables the mixer to have a measured single-sideband noise figure of 7.8 dB and a power conversion gain of 13.1 dB. The measured input-referred 1-dB compression point, IP1dB is -17.8 dBm while its OP1dB is -5 dBm. A two-tone test was carried out and the mixer exhibits an IIP3 of -6.2 dBm and an OIP3 of +6.9 dBm. All of the inductors are on-chip and the size of the mixer core is only 380 μm x 350 μm (0.133 mm2).

Additional Files

Published

2020-12-27

Issue

Section

Special Section on Best SBCCI2010 Papers