Analog Performance of SOI nMuGFETs with Different TiN Gate Electrode Thickness and High-k Dielectrics

Authors

  • Milene Galeti
  • Michele Rodrigues
  • Nadine Collaert
  • Eddy Simoen
  • Cor Claeys
  • João Antonio Martino

DOI:

https://doi.org/10.29292/jics.v6i2.345

Keywords:

TiN, High k, Analog Performance, MuGFETs

Abstract

This work presents an analysis of the analog performance of SOI MuGFET devices and the impact of different TiN metal gate electrode thickness.Thinner TiN metal gate allows achieving large gain and this effect can be attributed to the increased Early voltage values observed for thinner TiN metal gate. This VEA increase suggests an increase of the transversal electrical field for thin TiN metal gate (reduced gate oxide thickness) that is confirmed with the increment of the GIDL current.This impact on the voltage gain is maintained for short channel length.The impact of different gate dielectrics was also studied where high-k dielectric indicated a higher VT due to a VFB variation. Additionally, lower intrinsic voltage gain was observed for hafnium dielectric and this can be related to the lower Early voltage (VEA) present in this devices.

Additional Files

Published

2020-12-27

Issue

Section

Special Section on Best SBMicro2010 Papers