A Compact Low-Power CMOS Analog FSR Model-Based CNN

Authors

  • Edson P. Santana
  • Raimundo C. S. Freire
  • Ana Isabela A. Cunha

DOI:

https://doi.org/10.29292/jics.v7i1.357

Keywords:

Cellular Neural Network, Four-Quadrant Multiplier, Analog Focal Plane Image Processing

Abstract

A compact low-power CMOS analog circuit implementation of a Cellular Neural Network based on Full Signal Range Model (FSR-CNN) is presented. The required operations in cell definition are synapses (multiplication and summation) and saturated integration. In each synapse, a new multiplier architecture is employed with voltage and current inputs and a current output, which allows sharing building blocks and using continuously programmable weight values. Feasibility and usefulness of the proposed FSR cell architecture is verified through the simulation of two applications: the connected component detector and the border extractor.

Additional Files

Published

2020-12-27