An Approach for Power Estimation at Electronic System Level using Distributed Simulation

Authors

  • Helder F. A. Oliveira
  • Alisson V. Brito
  • Joseana M. F. R. Araujo
  • Elmar U. K. Melcher

DOI:

https://doi.org/10.29292/jics.v11i3.440

Keywords:

power estimation, electronic system level, distributed simulation

Abstract

The present research aims to develop an approach using HLA (High Level Architecture), enabling the cre-ation of a distributed and heterogeneous environment, composed by different tools and models to obtain a better trade-off between accuracy and run time in power estimation. These models can be described in different languages and/or abstraction levels, as well as use different power estimation approaches. The use of HLA enables the synchronized and distributed simulation of the elements that compose the simulation environment. The approach must allow the collecting and grouping of power estimation data in a centralized manner. As a case study, an MPSoC (MultiProcessor System-on-Chip) ESL/TLM model, described in C++/SystemC, and an ESL model, created on Ptolemy framework, have been used. The experimental results show the flexibility of the approach, which promotes an integrated view of power estimation data.

Additional Files

Published

2020-12-28