A 1 to 10-bit, 85.3 fJ/Conv-step ADC for RFID Sensors

Abstract

This paper presents the design results of an ultra-low power 1 to 10 bit arbitrary resolution switched capacitor analog to digital converter. In addition to using low-power elements, his project also used a library specifically optimized for the proposed converter rather than a standard library as in traditional approach. This approach enabled the overall converter consumption to be reduced by about 70 %. Consuming 7.29 μA at 1 V supply and taking less than 9 μs per conversion (10 bit mode) it can be used in LF, HF or UHF RFID passive sensor tags. The presented converter was designed in 180 nm CMOS technology occupying about 0.052 mm2 of silicon area. A simulation result shows a figure of merit equal to 85.3 fJ/Conversion-step and 9.5 effective number of bits.