Survey on Near-Data Processing: Applications and Architectures


  • Paulo Cesar Santos Federal University of Rio Grande do Sul (UFRGS) - Brazil
  • Francis Birck Moreira Federal University of Paraná (UFPR) - Brazil
  • Aline Santana Cordeiro Federal University of Paraná (UFPR) - Brazil
  • Sairo Raoní Santos Federal University of Paraná (UFPR) - Brazil
  • Tiago Rodrigo Kepe Federal Institute of Paraná (IFPR) - Brazil
  • Luigi Carro Federal University of Rio Grande do Sul (UFRGS) - Brazil
  • Marco Antonio Zanata Alves Federal University of Paraná (UFPR) - Brazil



Near-Data Processing (NDP), Near-Memory Accelerator (NMA), In-Memory Accelerators (IMA), Near-Cell Accelerators (NCA), Taxonomy


One of the main challenges for modern processors is the data transfer between processor and memory. Such data movement implies high latency and high energy consumption. In this context, Near-Data Processing (NDP) proposals have started to gain acceptance as an accelerator device. Such proposals alleviate the memory bottleneck by moving instructions to data whereabouts. The first proposals date back to the 1990s, but it was only in the 2010s that we could observe an increase in papers addressing NDP. It occurred together with the appearance of 3D-stacked chips with logic and memory stacked layers. This survey presents a brief history of these accelerators, focusing on the applications domains migrated to near-data and the proposed architectures. We also introduce a new taxonomy to classify such architectural proposals according to their data distance.

Additional Files





Special Issue on Intelligent, Energy-Efficient and Robust Computing Systems