A CGP-based Logic Flow: Optimizing Accuracy and Size of Approximate Circuits


  • Augusto André Souza Berndt Federal University of Santa Catarina (UFSC) - Brazil
  • Brunno Abreu Federal University of Rio Grande do Sul (UFRGS) - Brazil
  • Isac S. Campos Federal University of Santa Catarina (UFSC) - Brazil
  • Bryan Lima Federal University of Santa Catarina (UFSC) - Brazil
  • Mateus Grellert Federal University of Santa Catarina (UFSC) - Brazil
  • Jonata T. Carvalho Federal University of Santa Catarina (UFSC) - Brazil
  • Cristina Meinhardt Federal University of Santa Catarina (UFSC) - Brazil




Logic Minimization, Machine Learning, Cartesian Genetic Programming, Multi-variable Optimization, Evolutionary Computing


Logic synthesis tools face tough challenges when providing algorithms for synthesizing circuits with increased inputs and complexity. Machine learning techniques show high performance in solving specific problems, being an attractive option to improve electronic design tools. We explore Cartesian Genetic Programming (CGP) for logic optimization of exact or approximate Boolean functions in our work. The proposed CGP-based flow receives the expected circuit behavior as a truth-table and either performs the synthesis starting from random circuits or optimizes a circuit description provided in the format of an AND-Inverter Graph. The optimization flow improves solutions found by other techniques, using them for bootstrapping the evolutionary process. We use two metrics to evaluate our CGP-based flow: (i) the number of AIG nodes or (ii) the circuit accuracy. The results obtained showed that the CGP-based flow provided at least 22.6% superior results when considering the trade-off between accuracy and size compared with two other methods that brought the best accuracy and size outcomes, respectively.






Selected Papers from Symposium on Integrated Circuits and Systems Design 2021