Experimental Analysis of Trade-Off Between Transistor Efficiency and Unit Gain Frequency of Nanosheet NMOSFET down to -100 oC


  • Vanessa Cristina Pereira da Silva University of São Paulo (USP) - Brazil
  • Joao V. C. Leal University of São Paulo (USP) - Brazil
  • Welder F. Perina University of São Paulo (USP) - Brazil
  • Joao A. Martino University of São Paulo (USP) - Brazil
  • Eddy Simoen Interuniversity Microelectronics Centre (IMEC) - Belgium
  • Anabela Veloso Interuniversity Microelectronics Centre (IMEC) - Belgium
  • Paula G. D. Agopian São Paulo State University (UNESP) and University os São Paulo (USP) - Brazil




Nanosheet transistors, inversion coefficient, analog parameters, low temperature


This work presents a trade-off analysis between transistor efficiency (gm/ID which is proportional to the intrinsic voltage gain Av) and the unit gain frequency (fT) of nanosheet (NSH) NMOS devices for temperatures from room temperature down to -100 °C. The analyses were performed experimentally as a function of the inversion coefficient (IC) in order to determine the optimal application region for optimization of both parameters. These analyses were performed with NSH NMOS for channel lengths of 28 nm, 70 nm and 200 nm. It was observed that the optimal operation point takes place in the transition between moderate and strong inversion (IC=10) for the three analyzed temperatures, where the highest value obtained for gm/ID x fT was found. In this optimum bias point the AV is 45 dB (L=200 nm) and 39 dB (L=28 nm) and fT is 9 GHz (L=200 nm) and 186 GHz (L=28nm) both for T=25 °C, which should be suitable for many applications.






Selected Papers from Symposium on Microelectronics Technology and Devices 2021