Ultra-High Definition AV1 FME Interpolation Architectures Exploring Approximate Computing

Authors

  • William Kolodziejski Federal University of Pelotas (UFPel) - Brazil
  • Robson Domanski Federal University of Pelotas (UFPel) - Brazil
  • Marcelo Porto Federal University of Pelotas (UFPel) - Brazil
  • Bruno Zatt Federal University of Pelotas (UFPel) - Brazil
  • Luciano Agostini Federal University of Pelotas (UFPel) - Brazil

DOI:

https://doi.org/10.29292/jics.v17i2.558

Keywords:

Video Coding, AV1, FME, interpolation, hardware design, approximate computing

Abstract

Modern video encoders like the AOMedia Video 1 (AV1) implement several complex tools to allow the required high level of compression efficiency. The Fractional Motion Estimation (FME) is one of these complex tools, and AV1 FME defines 42 different interpolation filters. To handle such complexity, hardware acceleration using approximate computing has become an interesting alternative to be explored. This paper presents three optimized approximate architectures for the AV1 FME interpolation filters. The architectures reach real time interpolation for UHD 4K videos at 30 frames per second in a low cost, low power, and memory-efficient design. The architectures were synthesized for a 40nm TSMC standard-cells technology reaching power gains up to 83%, when compared to a precise architecture, and up to 20% when compared to a previously published approximated solution. The area gains were also expressive: up to 83% and 40%, respectively. The architectures also allow a memory bandwidth reduction of up to 59.5%, in comparison with the state-of-the-art solutions. The approximations implied small coding efficiency degradation of 0.54% and 1.25% in BD-BR. The presented architectures have the best results found in the literature when considering the trade-off among hardware cost, power dissipation, processing rate, memory bandwidth, and coding efficiency.

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Published

2022-09-17

Issue

Section

Selected Paper from Microelectronics Students Forum 2021