Survey on Reliability Estimation in Digital Circuits

Authors

  • Matheus Ferreira Pontes Federal University of Pelotas (UFPel) - Brazil
  • Clayton Farias Federal University of Rio Grande (FURG) - Brazil
  • Rafael Schvittz Federal University of Rio Grande (FURG) - Brazil
  • Paulo Butzen Federal University of Rio Grande do Sul (UFRGS) - Brazil
  • Leomar da Rosa Jr Federal University of Pelotas (UFPel) - Brazil

DOI:

https://doi.org/10.29292/jics.v16i3.568

Keywords:

Reliability, Fault Tolerance, Radiation Susceptibility, Digital Circuits

Abstract

The aggressive technology scaling has significantly affected the circuit reliability. The interaction of environmental radiation with the devices in the integrated circuits (ICs) may be the dominant reliability aspect of advanced ICs. Several techniques have been explored to mitigate the radiation effects and guarantee a satisfactory reliability levels. In this context, estimating circuit radiation reliability is crucial and a challenge that has not yet been overcome. For decades, several different methods have been proposed to provide circuit reliability. Recently, the radiation effects have been more faithfully incorporated in these strategies to provide the circuit susceptibility more accurately. This paper overviews the current trend for estimating the radiation reliability of digital circuits. The survey divides the approaches into two abstraction levels: (i) gate-level that incorporate the layout information and (ii) circuit-level that traditionally explore the logic circuit characteristic to provide the radiation susceptibility of combinational circuits. We also present an open-source tool that incorporates several previously explored methods. Finally, the actual research aspects are discussed, providing the newly emerging topic, such as selective hardening and critical vector identification.

Additional Files

Published

2021-12-31

Issue

Section

Special Issue on Hardware and Software Fault Tolerance