Performance Perspective of Gate-All-Around Double Nanosheet CMOS Beyond High-Speed Logic Applications


  • Eddy Simoen Ghent University - Belgium
  • Carlos H.S. Coelho São Paulo State University (UNESP) - Brazil
  • Vanessa C.P. da Silva University of São Paulo (USP) - Brazil
  • João A. Martino University of São Paulo (USP) - Brazil
  • Paula Ghedini Der Agopian São Paulo State University (UNESP) - Brazil
  • Alberto Oliveira Federal Technological University of Parana (UTFPR) - Brazil
  • Bogdan Cretu École Nationale Supérieure d'Ingénieurs de Caen (ENSICAEN) - France
  • Anabela Veloso Interuniversity Microelectronics Centre (IMEC) - Belgium



GAA CMOS, analog performance, cryogenic temperatures, low-frequency noise


In this review paper, the performance characteristics of Gate-All-Around (GAA) double nanosheet (NS) MOSFETs are described over a broad temperature range, from 78 K to 473 K (200 oC). Emphasis is on the analog operation, showing good potential. Besides the transistor length, the impact of the metal gate Effective Work Function and the vertical distance between the nanosheets has been studied. Among others, a clear Zero Temperature Coefficient (ZTC) gate voltage has been observed that can be modeled by considering the shift with temperature of the threshold voltage and the maximum transconductance. A trade-off has been noticed between the transistor efficiency and the unit gain frequency, whereby the optimal operation point occurs in strong inversion regime. The feasibility of designing simple analog circuits has also been demonstrated. Finally, a detailed investigation of the low-frequency noise behavior yields good values for the flicker noise Power Spectral Density in comparison with other technology nodes.






Special Issue on Emerging Semiconductor Devices