Two-Level and Multilevel Approximate Logic Synthesis

Authors

  • Gabriel Ammes Federal University of Rio Grande do Sul (UFRGS) - Brazil
  • Paulo Butzen Federal University of Rio Grande do Sul (UFRGS) - Brazil
  • André Reis Federal University of Rio Grande do Sul (UFRGS) - Brazil
  • Renato Ribas Federal University of Rio Grande do Sul (UFRGS) - Brazil

DOI:

https://doi.org/10.29292/jics.v17i3.661

Keywords:

approximate computing, approximate logic synthesis, digital design, ALS, survey

Abstract

Approximate computing represents a modern design paradigm that allows systems to have imprecise or inexact execution, aiming to optimize circuit area, performance, and power dissipation. The automatic construction of approximate integrated circuits (IC) is performed through computer-aided design (CAD) tools available in electronic design automation (EDA) frameworks. Approximate logic synthesis (ALS), in particular, treats two-level and multilevel topologies of combinational blocks in the development of digital IC design. This work provides a survey of ALS methods presented in the literature, from the pioneers until the state-of-the-art approaches.

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Published

2022-12-31

Issue

Section

Special Issue on Electronic Design Automation