Self-Cascode Current-Voltage Curve-Construction Algorithm from Single MOSFET Measurements for Analog Figures-of-Merit Extraction

Authors

  • Lígia Martins d'Oliveira Centro Universitário FEI
  • Valeriya Kilchytska Université catholique de Louvain-la-Neuve
  • Denis Flandre Université catholique de Louvain-la-Neuve
  • Michelly de Souza Centro Universitário FEI

DOI:

https://doi.org/10.29292/jics.v14i1.69

Keywords:

Self-Cascode, Analog Characterization, Silicon-On-Insulator, Composite Transistor

Abstract

This paper proposes a curve extraction method for I-V curves and analog figures-of-merit of self-cascode MOSFET associations (SC) using a code that exploits I-V curves of single transistors as input. The method was validated by using experimental measurements of fabricated SC and the very single transistors that compose them. The results indicate a very low error between the SC generated by the code and the measured reference for operation in saturation regime and above threshold voltage, for both the I-V curves and their derivatives. This method is then valid for the assessment of the SC structures in new technologies, avoiding experimental dedicated layouts or complex set-ups.

Additional Files

Published

2019-04-29

Issue

Section

Selected Papers from 33rd Symposium on Microelectronics Technology and Devices