Improvement of AlGaN/ GaN based HEMT with high performance rate for integrated circuit design for wide range of applications

Authors

  • Swati Dhondiram Jadhav Chtrapati Shivaji Maharaj University, Panvel - India
  • Aboo Bakar Khan Chtrapati Shivaji Maharaj University, Panvel - India

DOI:

https://doi.org/10.29292/jics.v19i1.747

Keywords:

AlGaN, GaN, GaN Barrier, AIN Spacer

Abstract

In the current research work, we focused on the design and analysis of a semiconductor device called High-Elec-tron-Mobility Transistor (HEMT) based on the AlGaN/GaN material system. An Aluminum Nitride spacer,Layer of Nucle-ation along with cap as a AlGaN and barrier of GaN with the channel of AlGaN are incorporated to enhance HEMT device performance.
The electrical characteristics of the proposed HEMT are an-alyzed. The Drain Current is found to be 0.18A/mm, indicating the device's ability to handle high current levels. The Electron Concentration is observed to have a maximum value of -96.12electrons/cm3 and varying based on the position in the channel for GaN Barrier thickness is 0.15mm. In the analysis of AC such as Gain of the Maximum Unilateral Power is deter-mined to be 83.41dB, indicating the ability of the device to am-plify signals. The Y-parameters, which characterize the de-vice's behavior at various frequencies of operation, are also de-termined. The capacitance between the electrode region Gate-Source (CGSMIN) is found to be 1.70×10^-11 F/mm, and alike The Capacitance between the electrode region the Gate-Drain Ca-pacitance (CGDMIN) is determined to be 4.7×10^-12 F/mm. Fur-thermore, an Electric Field of 96.51×10^3 V/mm is observed, in-dicating the strength of the electric field across the device. For HEMT device the simulation,The TCAD Silvaco software is be-ing practiced.

Author Biography

Aboo Bakar Khan, Chtrapati Shivaji Maharaj University, Panvel - India

HEAD OF THE DEPARTMENT, ELECTRICAL AND ELECTRONICS ENGINEERING

CHATRAPAPTI CHIVAJI MAHARAJ UNIVERSITY, PANVEL, MUMBAI

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Published

2024-03-15

Issue

Section

High performance Advanced Nanoscale FETs for Integrated Circuit Design. Guest Editors: Angsuman Sarkar (Kalyani Gov. Eng. College), Arpan Deyasi (RCC Inst. of Inf. Technology) and Debashis De (Maulana Abul Kalam Azad Univ. of Techn.)